Elsyca SmartPlate

Description

SmartPlate simulates the copper deposition process of printed circuit boards (PCB/PWB). The plating thickness is calculated on the surface as well as in the through-holes and vias based on the active pattern on the board. This allows manufacturers to optimize their production process and reduce scrap by plating within specifications.

Key Features

Key features are:

  • a sophisticated computer model that takes all relevant parameters into account: plating line chemistry, copper pattern layout, jig and plating line geometry, panel dimensions and electrical current;
  • integrated visualization of the pattern with the copper plating thickness on the surface and in the through holes;
  • easy identification of zones with plating thickness outside minimum and maximum specification window;
  • quantifiable relationship between the plating thickness in the coupons and the real holes;
  • import of industry standard data formats like Gerber and ODB;
  • seamless integration in Ucam, a leading CAM system for the manufacturing of printed circuit boards;
  • support of copper layer thickness for both panel and pattern plating steps.

Benefits

Elsyca's SmartPlate simulation technology accurately predicts the plated layer thickness on both the copper tracks and pads, and in the vias/throughholes. This brings the following benefits:

  • PCB designers can simulate the plating process at design time and improve the plateability of the board by changing the pattern design or background grid;
  • manufacturers can calculate the plating thickness at CAM time, correcting errors upfront of production by adapting process parameters or re-arranging prints on the boars, without the need for sample boards and independent of the operator;
  • based on the simulations results the CAM department identifies the critical holes and provides this information to production and quality control.

Use case

The printed circuit board (PCB) industry is constantly being pushed towards ongoing miniaturization, shorter delivery times and smaller operational margins. This means manufacturers are forced to produce more complex products in shorter times, with lower costs and higher specifications.

One of the most important determining factors of the cost is the yield in production: the percentage of panels that meets specifications. For the more difficult, high-end PCB's most of the production processes are running close to their limit, meaning more products are out of spec. To increase the yield by better controlling the different production steps is a constant necessity for every production manager.

One of the most critical steps in the production of printed circuit boards is the copper electroplating. In this electrochemical process tracks, through holes and vias are covered with some tens of microns of copper. There is a clear relation between the overall yield and the quality and control of the electroplating process. Especially for panels with a very complex layout the copper electroplating processes is not easy to control and thus a very determining steps towards the overall yield.

The current process knowledge is mainly based on experience and trial and error. As the costs of some prototypes can be quite high (10000 US$) or a yield increase could significantly increase the margin on high volume production, process improvement for the plating process can be very valuable. This means a modeling tool (simulation software) for the electroplating process is an important new development to gain more insight and control of the electroplating process.

Based on the numerical model presented above, simulations of the copper deposit thickness distribution on printed circuit boards are performed. A dedicated simulation tool Elsyca SmartPlate is developed to encapsulate the numerical model and facilitate the input of the relevant data. This includes the pattern on both sides of the panel, the electrolyte selection from the database and the specification of the process conditions like plating time and imposed current. The input screen for the plating parameters is shown in figure 1.

Based on these input parameters a finite element simulation of the electrical field is performed, taking the detailed layout of the panels into account. The result is a prediction of the copper layer thickness distribution over the panel as shown in figure 2. The blue color indicates areas with reduced copper thickness, the yellow and red colors indicated thick copper layers, typically located on the outer edges of the panel.

Also, predictions on the copper thickness inside the through-holes are performed. In figure 3 the through-holes are divided into 3 categories: the blue where the deposit is below the specification of 25 micron; the red where the deposit is above the specification of 50 micron; and the green where the deposit is between 25 and 50 micron, and thus are within spec.

The simulation results have been validated based on experimental input from two customers. The first is a comparison between the simulations and the measurements for a predefined through-hole in a test coupon for 5 different jobs. The test coupon is examined under the microscope and a thickness profile is obtained. The deposit thickness at the mouth of the through hole, both at the top and bottom, is then compared with the simulations and presented in table 1.

The second comparison is between different through holes, with different aspect ratios on one panel. The layout of the panel and the position of the measured through holes is shown in figure 4.


The copper thickness is measured in each hole using an eddy-current measurement system. The comparison between the simulated and measured plating thickness in the holes is shown in figure 5. An excellent agreement is observed between the computer calculations and the experimental results. Furthermore it is clear that the position of a through hole on the panel and inside a print can have a significant influence on the plating behaviour. Holes 1, 2 and 3 are identical, only their position on the panel is different. Hole 1 is located on the outer edge of the panel, close the current robber. Holes 2 and 3 are located further away from the edges. Both the simulations and the experiments agree that hole 1 has about 20% less copper than holes 2 and 3.

Using an advanced numerical simulations tool reliable calculations of the copper plating thickness on patterned PCB's become possible for industrial applications. All relevant aspects of the electroplating process are taken into account: the configuration of the plating tank and jig, the pattern on the PCB and the process conditions. A validation of the simulation tool has been performed by two different industrial end users. In each case an excellent agreement between measured and calculated deposit thickness is observed. These simulations form a first step in the optimisation of the copper thickness distribution either by changing the layout of the PCB or by upgrading the electroplating installation.

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